1. Field of the Invention
The present invention relates to light emission element array drive apparatus and method for sequentially setting at least one or more light emission thyristor groups arranged in array, into a lighting state.
2. Related Background Art
Conventionally, a self-scanning type light emission element array (SLED) has been disclosed in Japanese Patent Application Laid-Open Nos. 1-238962, 2-208067, 2-212170, 3-20457, 3-194978, 4-5872, 4-23367, 4-296579 and 5-84971; xe2x80x9cProposal of Light Emission Element Array For Optical Printer Integrating Drive Circuitsxe2x80x9d JAPAN HARD COPY, 1991 (A-17); xe2x80x9cProposal Of Self-Scanning Type Light Emission Element (SLED) Using PNPN Thyristor Structurexe2x80x9d THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS, Mar. 5, 1991; and the like. Such the SLED has been widely noticed as a recording light emission element.
FIG. 1 shows an example of a SLED 100 as a light emission element array. In the conventional art, FIG. 2 is a timing chart of various control signals externally transmitted to the SLED 100 to control the SLED 100 shown in FIG. 1, and indicates an example of a case where all the light emission elements are driven.
In FIG. 1, a VGA 101 corresponding to a power supply voltage of the SLED 100 is connected to diodes 141, 142, 143, 144 and 145. These diodes 141, 142, 143, 144 and 145 are cascade connected to a start pulse xcfx86S 145 respectively through resistors 102, 103, 104, 105 and 106. As shown in FIG. 1, the SLED 100 is composed of a group in which shift thyristors S1xe2x80x2, S2xe2x80x2, S3xe2x80x2, S4xe2x80x2 and S5xe2x80x2 are arranged in array as control elements, a group in which light emission thyristors S1, S2, S3, S4 and S5 are arranged in array as light emission elements, and the like. Gate signals of the light emission thyristors and the shift thyristors are connected to each other. For example, the gate signal of the first light emission thyristor S1 is connected to the gate signal of the first shift thyristor S1xe2x80x2, and further connected to a signal input section Va to which the start pulse xcfx86S 145 is transmitted. The gate signal of the second light emission thyristor S2 is connected to the gate signal of the second shift thyristor S2xe2x80x2, and further connected to a cathode Vb of the diode 141 which is connected to the terminal Va to which the start pulse xcfx86S 145 is transmitted. The gate signal of the third light emission thyristor S3 is connected to the gate signal of the third shift thyristor S3xe2x80x2, and further connected to a cathode Vc of the diode 142. Similarly, the gate signal of the fifth light emission thyristor S5 is connected to the gate signal of the fifth shift thyristor S5xe2x80x2, and further connected to a cathode Ve of the diode 144.
Hereinafter, a driving method of the SLED 100 will be described with reference to the timing chart shown in FIG. 2.
In FIG. 2, initially, voltage of the start pulse xcfx86S 145 is varied from 0V to 5V. By varying the voltage of the start pulse xcfx86S 145 to 5V, a voltage of the Va becomes 5.0V, a voltage of the Vb becomes 3.6V (forward direction voltage down is 1.4V), a voltage of the Vc becomes 2.2V, a voltage of the Vd becomes 0.8V, voltages of the Ve and the following become 0. V. Then, voltage of the gate signals of the shift thyristors S1xe2x80x2 and S2xe2x80x2 are varied from 0V to 5.0V and 3.6V respectively. In this state, by varying voltage of a shift pulse xcfx861135 from 5V to 0V, potentials of anode, cathode and gate of the shift thyristor S1xe2x80x2 become 5V, 0V and 3.6V respectively. Thus, the thyristor becomes an ON condition, whereby the shift thyristor S1xe2x80x2 becomes an ON state. In this state, even if the voltage of the start pulse xcfx86S 145 is set at 0V, since the shift thyristor S1xe2x80x2 is in the ON state, the voltage of the Va becomes 5V (e.g., 4.8V in FIG. 2). This is because the pulse is applied through the resistor 102, concerning the start pulse xcfx86S 145, and the potential difference between the anode and gate becomes almost zero upon setting the thyristor into an ON state. Therefore, even if the voltage of the start pulse xcfx86S 145 is set at 0V, the ON state of the first shift thyristor S1xe2x80x2 is maintained and a first shifting operation terminates. In this state, if voltage of a light emission thyristor drive clock xcfx86I 110 is varied from 5V to 0V, since the light emission thyristor S1 comes to have the same condition as that in which the shift thyristor S1xe2x80x2 becomes the ON state, the light emission thyristor S1 becomes an ON state and the first light emission thyristor S1 is lighted. At the first light emission thyristor S1, the potential difference between an anode and a cathode of the light emission thyristor S1 becomes zero by returning the voltage of the light emission thyristor drive clock xcfx86I 110 to 5V. Thus, since a minimum maintaining current for the light emission thyristor S1 can not be flowed, the light emission thyristor S1 becomes an OFF state, thereby lighting off the thyristor S1.
Subsequently, transfer of the ON state of the thyristor from the shift thyristor S1xe2x80x2 to the shift thyristor S2xe2x80x2 will be explained. Even if the light emission thyristor S1 becomes the OFF state, the voltage of the shift pulse xcfx861135 is still 0V. Thus, also the shift thyristor S1xe2x80x2 is still in the ON state, the gate voltage Va of the shift thyristor S1xe2x80x2 is 5V (e.g., 4.8V in FIG. 2) and the voltage of the Vb is 3.6V. In this state, by varying voltage of a shift pulse xcfx862120 from 5V to 0V, anode, cathode and gate voltages of the shift thyristor S2xe2x80x2 become 5V, 0V and 3.6V respectively, whereby the shift thyristor S2xe2x80x2 becomes an ON state. After the shift thyristor S2xe2x80x2 becomes the ON state, by varying the voltage of the shift pulse xcfx861135 from 0V to 5V, the shift thyristor S1xe2x80x2 becomes an OFF state in the manner similar to that the light emission thyristor S1 became the OFF state. Thus, the ON state of the shift thyristor is transferred from the shift thyristor S1xe2x80x2 to the shift thyristor S2xe2x80x2. Then, the light emission thyristor S2 can be selectively lighted by varying the voltage of the light emission thyristor drive clock xcfx86I 110 from 5V to 0V. Hereinafter, the reason of lighting only the light emission thyristor of which corresponding shift thyristor is in the ON state will be explained. Since gate voltages of thyristors other than the both-side thyristors (e.g., S1xe2x80x2 and S3xe2x80x2) of the ON state thyristor (e.g., S2xe2x80x2) are 0V, the thyristors do not become the ON state. Also, as to the both-side shift thyristors (e.g., S1xe2x80x2 and S3xe2x80x2), since potential of the drive clock xcfx86I 110 becomes 3.6V (forward direction voltage down at each light emission thyristor) due to the fact that the shift thyristor (e.g., S2xe2x80x2) becomes the ON state, the both-side thyristors (e.g., S1xe2x80x2 and S3xe2x80x2) become such a state as the potential difference between the gate and the cathode is minimized and a minimum maintaining current for the thyristors can not be flowed. Therefore, it is impossible to set the both-side shift thyristors (e.g., S1xe2x80x2 and S3xe2x80x2) into an ON state.
As described above, conventionally, when the voltage 5V of the start pulse xcfx86S 145 is supplied, the first bit shift thyristor S1xe2x80x2 is set into an ON state by varying the voltage of the shift pulse xcfx861135 (acting as drive signal for odd-number shift thyristors S1xe2x80x2 and S3xe2x80x2) to 0V, and the gate voltage of the light emission thyristor S1 is maintained at 5V. Thereafter, the voltage of the light emission thyristor drive clock xcfx86I 110 for the light emission thyristor S1 is set at 0V, thereby lighting the light emission thyristor S1.
However, shift speed of sequentially shifting the gate voltage of the shift thyristor being a characteristic of the SLED is changed according to a manufacturing condition of semi-conductive wafers which form the SLED. Therefore, in a case where shifting and light emitting operations are performed at high speed, the shifting of the gate voltage of the shift thyristor is sometimes delayed. That is, there occurs such a phenomenon as the light emission thyristor intended to be lighted is not lighted but another thyristor of which gate voltage is in a most high level is lighted. As a result, the shifting of light emitting operation becomes unstable. Especially, when the first bit light emission thyristor is lighted, the gate voltages of the shift thyristors other than the first bit tend to become such a state as the voltage can not completely become 0V because of high speed shifting. In this state, in a case where the voltage of the start pulse xcfx86S 145 is set at 5V and the first bit shift thyristor is set into an ON state, if the gate voltage of another shift thyristor is higher than that of the first bit shift thyristor, the first bit shift thyristor does not become an ON state but the shift thyristor of which gate voltage is high becomes an ON state. Therefore, if the voltage of the light emission thyristor drive clock xcfx86I 110 is set at 0V intending to set the first bit light emission thyristor into an ON state, the light emission thyristor, of which bit corresponds to that of the above another shift thyristor of which gate voltage is high becomes ON state, is to be lighted. As a result, there occurs such a problem as a lighting state of the first bit can not be sequentially shifted to other bits.
The present invention has been made to solve the above-described problem, and an object thereof is to provide light emission element array drive apparatus and method for surely setting a first bit light emission thyristor into an ON state at first, thereby stabilizing a shift of light emitting operation from the first bit light emission thyristor.
In order to solve the above problem, the present invention provides a light emission element array drive apparatus which drives a light emission element array having plural light emission thyristors arranged in array and plural shift thyristors arranged in array, each gate of the shift thyristors being connected to each gate of the light emission thyristors, the apparatus comprising:
a generation unit for generating a shift signal to sequentially shift ON states of the shift thyristors; and
a generation unit for generating a start signal to start drive of the light emission element array,
wherein a gate voltage of the first light emission thyristor is supplied according to the start signal without setting the first shift thyristor into an ON state according to the shift signal.
Further, the present invention provides a light emission element array drive apparatus which drives a light emission element array having plural light emission elements (arranged in array) and plural control elements (arranged in array, and each element supplies an ON state to corresponding light emission element), the apparatus comprising:
a generation unit for generating a shift signal to sequentially shift ON states of the control elements; and
a generation unit for generating a start signal to start drive of the light emission element array,
wherein the first light emission element is set into an ON state according to the start signal.